![]() |
Kinetis SDK API Reference Manual
1.0.0-beta
Freescale Semiconductor, Inc.
|
| Defines the calibration parameter structure | |
| Defines the channel configuration structure | |
| Defines the ADC extended configuration structure | |
| Defines the ADC basic configuration structure | |
| Audio buffer structure | |
| Audio codec operation structure | |
| The Codec structure | |
| The definition of the audio device which may be a controller | |
| The operations of an audio controller, for example SAI, SSI and so on | |
| Data structure for data structure configuration | |
| Data structure for the DMA channel management | |
| Data structure to get status of the DMA channel status | |
| DSPI baud rate divisors settings configuration structure | |
| DSPI command and data configuration structure | |
| DSPI data format settings configuration structure | |
| DSPI delay settings configuration structure | |
| Data structure containing information about a device on the SPI bus | |
| DSPI hardware configuration settings for master mode | |
| Runtime state structure for the DSPI master driver | |
| The user configuration structure for the DSPI master driver | |
| Configuration of the DSPI IRQs shared by master and slave drivers | |
| The set of callbacks for the DSPI slave mode | |
| DSPI hardware configuration settings for slave mode | |
| Runtime state of the DSPI slave driver | |
| User configuration structure and callback functions for the DSPI slave driver | |
| Data structure for the DMA channel | |
| DMA configuration structure | |
| Error status of the eDMA module | |
| EDMA TCD Minor loop mapping configuration | |
| Data structure for configuring a discrete memory transfer | |
| EDMA TCD | |
| EDMA TCD control configuration | |
| Defines the ENET VLAN frame header structure | |
| Define 8022 header | |
| Defines the buffer descriptor structure for the little-Endian system and endianness configurable IP | |
| Define common status structure | |
| Defines the configuration structure for the 1588 PTP timer | |
| Defines the receive accelerator configuration | |
| Defines the receive FIFO configuration | |
| Defines the transmit accelerator configuration | |
| Defines the transmit FIFO configuration | |
| Defines the ENET device data structure for the ENET | |
| Define ECB structure contains protocol type and it's related service function | |
| Defines the ENET header structure | |
| Define Structure for Ethernet packet header | |
| Defines the basic application for the ENET device | |
| Defines the basic configuration structure for the ENET device | |
| Defines the ENET MAC context structure for the buffer address, buffer descriptor address, etc | |
| Defines the ENET MAC packet buffer structure | |
| Defines the multicast group structure for the ENET device | |
| Defines the basic configuration for PHY | |
| Defines the receive buffer descriptor configure structure | |
| Defines the ENET packets statistic structure | |
| Defines the transmit buffer descriptor configure structure | |
| Type for an event group object in FreeRTOS | |
| Type for an event group object | |
| Type for an event group object in uCOS-II | |
| Type for an event group object in uCOS-III | |
| FlexCAN bus error counters | |
| FlexCAN bit rate and the related timing segments structure | |
| FlexCAN data info from user | |
| FlexCAN RX FIFO ID filter table structure | |
| FlexCAN MB code and status for receiving | |
| FlexCAN MB code and status for transmitting | |
| FlexCAN message buffer structure | |
| FlexCAN Rx FIFO configuration | |
| FlexCAN timing related structures | |
| FlexCAN configuration | |
| Channel information | |
| Combines channel information | |
| FlexTimer module configuration | |
| FlexTimer edge mode | |
| FlexTimer driver PWM parameter | |
| Internal driver state information grouped by naming | |
| The GPIO input pin configuration structure | |
| The GPIO input pin structure | |
| The GPIO output pin configuration structure | |
| The GPIO output pin structure | |
| I2C module configuration | |
| Information necessary to communicate with an I2C slave device | |
| Internal driver state information | |
| Brief Definition of application-implemented callback functions used by the I2C slave driver | |
| Type for a resource locking object | |
| LPUART configuration structure | |
| Structure for idle line configuration settings | |
| LPUART interrupt configuration structure, default settings are 0 (disabled) | |
| Runtime state of the LPUART driver | |
| Structure for all LPUART status flags | |
| LPUART configuration structure for user | |
| Type for a message queue declaration and creation | |
| Type for message queue in uCOS-II | |
| Define PCB structure contains two fragments | |
| Define Structure that contains fragment of PCB | |
| Define PCB structure for RTCS adaptor | |
| Define PCB structure contains two fragments | |
| PIT timer configuration structure | |
| Poll function slot | |
| Poll structure | |
| Structure is used to hold the time in a simple "date" format | |
| Time representation: hours, minutes, second and total seconds | |
| RTC timer configuration structure | |
| Defines the PCM data format | |
| The SAI handler structure | |
| The description structure for the SAI TX/RX module | |
| SDHC Card Structure | |
| SDHC Command Structure | |
| SDHC Data Structure | |
| SDHC Configure Structure | |
| SDHC Host Device Structure | |
| SDHC Request Structure | |
| SDHC Initialization Configuration Structure | |
| Clock gate module configuration table structure | |
| Clock name configuration table structure | |
| Clock source value table structure | |
| Power mode control configuration used for calling the smc_set_power_mode API | |
| Power mode protection configuration | |
| Soundcard status includes the information which the application can see | |
| A sound card includes the audio controller and a Codec | |
| SPI hardware configuration settings | |
| The set of callbacks used for SPI slave mode | |
| Definition of application implemented configuration and callback | |
| Information about a device on the SPI bus | |
| Type for an synchronization object | |
| UART configuration structure | |
| Structure for idle line configuration settings | |
| UART interrupt configuration structure, default settings are 0 (disabled) | |
| Runtime state of the UART driver | |
| Structure for all UART status flags | |
| User configuration structure for UART driver | |
| Data struct for watchdog initialize |